The majority of present day integrated circuits (ICs) are implemented by using a plurality of interconnected field effect transistors (FETs), also called metal oxide semiconductor field effect transistors (MOSFETs), or simply MOS transistors. An MOS transistor includes a gate electrode as a control electrode and spaced apart source and drain electrodes between which a current can flow. A control voltage applied to the gate electrode controls the flow of current through a channel between the source and drain electrodes. As the complexity of the integrated circuits increases, more and more MOS transistors are needed to implement the integrated circuit function. As more and more transistors are designed into the IC, it becomes important to shrink the size of individual MOS transistors so that the size of the IC remains reasonable and the IC can be reliably manufactured.
During IC fabrication, a contact is made to the gate electrode, the source electrode, and the drain electrode to access the transistor and allow interconnections between the transistor and other devices of the IC. A contact is an opening through one or more insulating layers that is subsequently filled with a conductive material that forms a contact to a device region. The conductive material forming the contact, which often takes the form of a plug, may be tungsten or other metals. However, as the size of transistors decreases, fabrication of the contacts to a transistor within the tolerances allowed by the relevant design rules becomes more difficult. Often the gate electrode and either the drain electrode or the source electrode are maintained at or regulated by the same voltage level, thus making one of the three contacts redundant. It is therefore advantageous to eliminate redundancy of contacts to reduce device size.
Accordingly, it is desirable to provide a semiconductor device utilizing only one contact to regulate the voltage of both the gate electrode and one of the drain or source electrode. In addition, it is desirable to provide a method for fabricating a field effect transistor that allows small feature size by electrically coupling the drain or source electrode and the gate electrode. Furthermore, other desirable features and characteristics of the present invention will become apparent from the subsequent detailed description of the invention and the appended claims, taken in conjunction with the accompanying drawings and this background of the invention.